1. Field of the Invention
The present invention relates to an interposer chip mounting a semiconductor chip and manufacturing method thereof, and particularly, to an interposer chip used in an SIP (System In a Package) structure in which a plurality of semiconductor chips are sealed in one package and manufacturing method thereof.
2. Description of Related Art
In a semiconductor device, a wiring layer is formed on an insulating film. It is required that the wiring layer is formed so as not to be stripped.
Technologies for obtaining a tough semiconductor structure are disclosed in document 1 (Japanese patent publication 2000-269215) and document 2 (Japanese patent publication 2004-282000).
Furthermore, a semiconductor device is disclosed in document 3 (Japanese patent publication 2007-142333), whose object is to obtain a semiconductor device in which an under pad structure has a resistance against forces in a tucking direction, a stripping direction and a horizontal direction. FIG. 1A is a perspective plan view showing a pad part of the semiconductor device disclosed in document 3, and FIG. 1B is a sectional view showing a cross-section along C-C′ in FIG. 1A. This semiconductor package includes reinforcement patterns (124, 126, 132, 134, 140, 142, and 148) arranged in an under pad region that is located under a pad 104. An occupancy rate of the reinforcement patterns is within a predetermined range, and an occupancy rate of the reinforcement patterns in a direction orthogonal to a predetermined chip edge part is larger than that in a direction parallel to the predetermined chip edge part.
By the way, with upgrading and increasing of functions in the semiconductor device such as system LSI (Large Scale Integration), a number of manufacturing processes is increased, and it becomes difficult to realize a high yield. From this viewpoint, an SIP (System In a Package) is focused, in which a plurality of universal semiconductor chips are sealed in one package. In the SIP, an interposer chip is used. The interposer chip is provided for changing an order of wirings extending from a plurality of semiconductor chips (rewiring), and has a rewiring layer for rewiring.